.ALIASES
V_V1            V1(+=N13552 -=0 ) CN @CHAPTER 2_1.Large signal buck(sch_1):INS13970@SOURCE.VAC.Normal(chips)
X_U1            U1(1=N12985 2=0 3=N138742 4=0 d=N13552 ) CN @CHAPTER 2_1.Large signal
+buck(sch_1):INS13858@APPLICATION.DCXFMR.Normal(chips)
C_C1            C1(1=0 2=VOUT ) CN @CHAPTER 2_1.Large signal buck(sch_1):INS13892@ANALOG.C.Normal(chips)
V_Vin           Vin(+=N12985 -=0 ) CN @CHAPTER 2_1.Large signal buck(sch_1):INS13908@SOURCE.VDC.Normal(chips)
L_L1            L1(1=N138742 2=VOUT ) CN @CHAPTER 2_1.Large signal buck(sch_1):INS13928@ANALOG.L.Normal(chips)
R_Rload          Rload(1=0 2=VOUT ) CN @CHAPTER 2_1.Large signal buck(sch_1):INS13948@ANALOG.R.Normal(chips)
_    _(vout=VOUT)
.ENDALIASES
